Design and Implementation of a Self-Checking Rotator Using Berger Code

المؤلفون

  • A. M. Ejamail Computer engineering & IT, College of Technology Sciences, Bani-Walid -Libya مؤلف
  • A. A. Khalleefah 4Department of Computer engineering, College of ELECTRONIC TECHNOLOGY, Bani-Walid –Libya مؤلف
  • A. M. Salim 3Computer engineering & IT, College of Technology Sciences, Bani-Walid -Libya مؤلف
  • A. H. Maamar Department of Computer engineering, College of ELECTRONIC TECHNOLOGY, Bani-Walid –Libya مؤلف

DOI:

https://doi.org/10.58916/jhas.v8i3.150

الكلمات المفتاحية:

Berger Code، Rotator Register، Two-Rail Checker (TRC، Self-checking

الملخص

Abstract: The advances in semiconductor generation have greatly improved the scale of integration. Today virtual systems are extra complicated than ever earlier than. These complex circuits are greater susceptible temporary and intermittent faulty. The complexity of the digital circuits results in extra crosstalk, noise, and different assets of temporary errors during normal operations. Conventional off-line testing techniques cannot guarantee detection of these faults; they can be detected by using on-line or concurrent error detection (CED). Concurrent error detection methods allow digital systems to affirm the correctness in their effects in the course of regular operation. Berger Code is one of the famous codes for CED applications because it could stumble on all unidirectional errors in digital structures. This paper proposes a layout to achieve the self-checking checker used of Berger code as a means of incorporating CED right into a self-checking for the rotate register.

التنزيلات

تنزيل البيانات ليس متاحًا بعد.

المراجع

. Subhasish Mitra, "Diversity Techniques for Concurrent Error Detection", Technical Report, Center for reliable computing, May 2000.

P. K. Lala. Self-Checking and Fault-Tolerant Digital System Design. Morgan Kaufman Publishers, San Francisco, 2001.

. Manoj Franklin, "A Study of Time Redundant Fault Tolerance Techniques for Superscalar Processors" Department of Electrical & Computer Engineering, Clemson University, Clemson, USA, 1995 IEEE.

. Tony R. Kuphaldt Lessons In Electric Circuits,

Volume IV Digital Fourth Edition, last update

November 01, 2007, openbookproject.net/

electricCircuits.

Huda Abugharsa, and Ali Maamar," Self Checking Systolic LIFO Stack",7th WSEAS Int. Conf. on Instrumentation Measurement, Circuits and Systems (IMCAS '08), Hangzhou, China, April 6-8, 2008.

KHADIJA F. O. ALGHEITTA. AMAL J. MAHFOUD. ALI H. MAAMAR. Design of a Self-Checking Up Counter. International Conference on Advanced in Computing, Engineering and Learning Technologies, Abu Dhabi, UAE, 2013.

Mustafa Abd-El-Barr," Design and Analysis of Reliable and Fault-Tolerant Computer Systems ", Imperial College Press, 2007, ISBN 1-86094-668-2.

VARADAN SAVULIMEDU VEERAVALLI. Diagnosis And Error Correction For A Fault-Tolerant Arithmetic And Logic Unit For Medical Microprocessors, Graduate School- New Brunswick Rutgers, The State University of New Jersey October, 2008.

B. W. Johnson. Design and Analysis of Fault Tolerant Digital Systems. Addison-Wesley, Reading, MA, 1989.

D. K. Pradhan. Fault-Tolerant Computing: Theory and Techniques, volume I. Prentice Hall, Englewood Cliffs, New Jersey, 2003.

T. R. Stankovic, M. K. Stojcev, and G. Ordjevic. Design of Self-Checking Combinational Circuits. In Proc. of the International Conf. on Telecommunications in Modern Satellite, Cable and Broadcasting Services, volume 17, pages 763-768, October 2003.

التنزيلات

منشور

2023-09-07

كيفية الاقتباس

A. M. Ejamail, A. A. Khalleefah, A. M. Salim, & A. H. Maamar. (2023). Design and Implementation of a Self-Checking Rotator Using Berger Code. مجلة جامعة بني وليد للعلوم الإنسانية والتطبيقية, 8(3), 162-167. https://doi.org/10.58916/jhas.v8i3.150

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